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151

XMEGA A [MANUAL]

8077I–AVR–11/2012

14.

TC0/1 – 16-bit Timer/Counter Type 0 and 1

14.1

Features

16-bit timer/counter

32-bit timer/counter support by cascading two timer/counters

Up to four compare or capture (CC) channels

– Four CC channels for timer/counters of type 0

– Two CC channels for timer/counters of type 1

Double buffered timer period setting

Double buffered capture or compare channels

Waveform generation:

– Frequency generation

– Single-slope pulse width modulation

– Dual-slope pulse width modulation

Input capture:

– Input capture with noise cancelling

– Frequency capture

– Pulse width capture

– 32-bit input capture

Timer overflow and error interrupts/events

One compare match or input capture interrupt/event per CC channel

Can be used with event system for:

– Quadrature decoding

– Count and direction control

–Capture

Can be used with DMA and to trigger DMA transactions

High-resolution extension

– Increases frequency and waveform resolution by 4x (2-bit) or 8x (3-bit)

Advanced waveform extension:

– Low- and high-side output with programmable dead-time insertion (DTI)

– Event controlled fault protection for safe disabling of drivers

14.2

Overview

Atmel AVR XMEGA devices have a set of flexible, 16-bit timer/counters (TC). Their capabilities include accurate program

execution timing, frequency and waveform generation, and input capture with time and frequency measurement of digital

signals. Two timer/counters can be cascaded to create a 32-bit timer/counter with optional 32-bit capture.

A timer/counter consists of a base counter and a set of compare or capture (CC) channels. The base counter can be

used to count clock cycles or events. It has direction control and period setting that can be used for timing. The CC

channels can be used together with the base counter to do compare match control, frequency generation, and pulse

width waveform modulation, as well as various input capture operations. A timer/counter can be configured for either

capture or compare functions, but cannot perform both at the same time.

A timer/counter can be clocked and timed from the peripheral clock with optional prescaling or from the event system.

The event system can also be used for direction control and capture trigger or to synchronize operations.

There are two differences between timer/counter type 0 and type 1. Timer/counter 0 has four CC channels, and

timer/counter 1 has two CC channels. All information related to CC channels 3 and 4 is valid only for timer/counter 0.

Only Timer/Counter 0 has the split mode feature that split it into 2 8-bit Timer/Counters with four compare channels each.

Some timer/counters have extensions to enable more specialized waveform and frequency generation. The advanced

waveform extension (AWeX) is intended for motor control and other power control applications. It enables low- and high-

side output with dead-time insertion, as well as fault protection for disabling and shutting down external drivers. It can

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